Forming silicon trench isolation (STI) in semiconductor...

Forming strained source drain junction field effect transistors

Forming trench isolators in semiconductor devices

Forming ultra-shallow junctions

Formulation of high performance transistors using gate trim etch

Formulation of multiple gate oxides thicknesses without...

Four-bit finfet NVRAM memory device

Four-transistor static-random-access-memory and forming method

Fringing capacitor structure

Fringing capacitor structure

Full silicide gate for CMOS

Fully depleted SOI transistor with elevated source and drain

Fully depleted strained semiconductor on insulator...

Fully isolated dielectric memory cell structure for a dual...

Fully isolated dielectric memory cell structure for a dual...

Fully recessed semiconductor method for low power applications

Fully recessed semiconductor method for low power...

Fully self-aligned high speed low power MOSFET fabrication

Fully self-aligned method for fabricating transistor and memory

Fully silicided NMOS device for electrostatic discharge...