Reduced mask count buried layer process
Reducing extrinsic base resistance in an NPN transistor
Reduction of dislocations in a heteroepitaxial semiconductor str
Reduction of silicon defect induced failures as a result of impl
Reference voltage supply circuit having reduced dispersion...
RF power transistor
RF power transistor having improved stability and gain
Schottky diode and method of manufacture
Selective links in silicon hetero-junction bipolar...
Selective links in silicon hetero-junction bipolar...
Self aligned compact bipolar junction transistor layout, and...
Self aligned compact bipolar junction transistor layout, and...
Self aligned poly emitter bipolar technology using damascene tec
Self aligned process for BJT fabrication
Self aligned ring electrodes
Self aligned symmetric intrinsic process and device
Self aligned symmetric process and device
Self-aligned base ohmic metal for an HBT device cross-reference
Self-aligned bipolar transistor manufacturing method
Self-aligned emitter and base BJT process and structure