Reduced mask count buried layer process

Details Reduced mask count buried layer process Reduced mask count buried layer process

2005-12-27

2005-12-27

Mulpuri, Savitri (Department: 2812)

Semiconductor device manufacturing: process

Forming bipolar transistor by formation or alteration of...

C438S526000

Reexamination Certificate

active

06979624

ABSTRACT:
An N type buried layer is formed, in one embodiment, by a non selective implant on the surface of a wafer and later diffusion. Subsequently, the wafer is masked and a selective P type buried layer is formed by implant and diffusion. The coefficient of diffusion of the P type buried layer dopant is greater than the N type buried layer dopant so that connections can be made to the P type buried layer by P wells which have a lower dopant concentration than the N buried layer.

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