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Testing IO timing in a delay locked system using separate...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Testing logic and embedded memory in parallel

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing logic associated with numerous memory cells in the word

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Patent

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Testing measurements

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Testing measurements

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Testing mechanism in a semiconductor integrated circuit device u

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Testing memory modules on a solder-side adaptor board...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Testing memory modules with a PC motherboard attached to a...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Testing memory units in a digital circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Testing method and apparatus assuring semiconductor device...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing method and apparatus for first-in first-out memories

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Patent

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Testing method and apparatus for identifying disturbed cells...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Testing method and tester

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Testing method and testing device for starting up systems...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Testing method for devices with status flags

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Patent

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Testing method for dynamic logic keeper device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing method for permanent electrical removal of an...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing method for permanent electrical removal of an...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Testing method for permanent electrical removal of an...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing method of semiconductor memory device and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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