Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
2007-06-26
2007-06-26
Chung, Phung My (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C365S225700, C365S185050
Reexamination Certificate
active
11110636
ABSTRACT:
An apparatus and method of disconnecting or disabling an input/output terminal of an integrated circuit after packaging. Each input/output terminal of the integrated circuit includes a disabling device coupled thereto between the input/output terminal and the output driver of the respective input/output terminal. A DRAM module is disclosed having a plurality of partially good DRAM devices wherein the known bad input/output terminals are permanently disconnected using a disabling device, both the known good and known bad input/output terminals being coupled to conductive traces of a carrier substrate.
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Chung Phung My
Micro)n Technology, Inc.
TraskBritt
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