Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Patent
1996-09-11
2000-02-08
Beausoliel, Jr., Robert W.
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
365201, G06F 1100
Patent
active
060237775
ABSTRACT:
The present invention provides a design method and apparatus for improving the testing of devices having status flags that indicate when particular boundary conditions are met. The present invention enables a subset of the overall device architecture that requires much less testing and vector analysis to fully analyze the device characteristics. The smaller subset of the device maximizes the number of in-depth analysis tests that can be run to provide a reliable tested device. After the tests are run on the smaller subset of the device, a smaller subset of tests may be executed on the entire full depth array with confidence that the in-depth tests have been previously executed. The present invention method and apparatus can be enabled during design, device characterization and production test phases of the product.
REFERENCES:
patent: 4802122 (1989-01-01), Auvinen et al.
patent: 4839866 (1989-06-01), Ward et al.
patent: 4875196 (1989-10-01), Spaderna et al.
patent: 4891788 (1990-01-01), Kreifels
patent: 5084837 (1992-01-01), Matsumoto et al.
patent: 5088061 (1992-02-01), Golnabi et al.
patent: 5175836 (1992-12-01), Morgan
patent: 5228002 (1993-07-01), Huang
patent: 5262996 (1993-11-01), Shiue
patent: 5305253 (1994-04-01), Ward
patent: 5311475 (1994-05-01), Huang
patent: 5317756 (1994-05-01), Komatsu et al.
patent: 5367486 (1994-11-01), Mori et al.
patent: 5404332 (1995-04-01), Sato et al.
patent: 5406273 (1995-04-01), Nishida et al.
patent: 5406554 (1995-04-01), Parry
patent: 5426612 (1995-06-01), Ichige et al.
patent: 5467319 (1995-11-01), Nusinov et al.
patent: 5490257 (1996-02-01), Hoberman et al.
patent: 5506809 (1996-04-01), Csoppenszky et al.
patent: 5513318 (1996-04-01), van de Goor et al.
patent: 5521876 (1996-05-01), Hattori et al.
patent: 5546347 (1996-08-01), Ko et al.
patent: 5550749 (1996-08-01), Dey et al.
patent: 5617531 (1997-04-01), Crouch et al.
patent: 5642318 (1997-06-01), Knaack et al.
Beausoliel, Jr. Robert W.
Cypress Semiconductor Corp.
Iqbal Nadeem
Maiorana P.C. Christopher P.
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