Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
1998-07-14
2001-02-27
Tu, Christine T. (Department: 2784)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C703S014000, C703S022000
Reexamination Certificate
active
06195773
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an LSI defective automatic analysis system and an analyzing method therefor, and a recording medium of storing a program for causing a computer to execute the analyzing method. More specifically, the present invention relates to an LSI defective automatic analysis system configured to automatically search for a defective cause place in an LSI by use of an electron beam, and an analyzing method therefor, and a recording medium of storing a program for causing a computer to execute the analyzing method.
2. Description of Related Art
As one effective means for searching for a defective cause place in an LSI, an electron beam tester has been used. A test signal is applied to an defective LSI in a vacuum chamber by means of an LSI tester, and an electron beam is also irradiated on a surface of the LSI, so that the amount of secondary electrons created as the result of the irradiation of the electron beam is measured. A relative potential can be known on the basis of whether the amount of secondary electrons is large (the potential is relatively low) or small (the potential is relatively high). Furthermore, a system for automatically carrying out a defective cause place search on the basis of this method, has been proposed (Japanese Patent Application Pre-examination Publication No. JP-A-63-124438 (an English abstract of JP-A-63-124438 is available and the content of the English abstract is incorporated by reference in its entirety into this application) and Japanese Patent Application No. Heisei 08-149641 (which was published as Japanese Patent Application Pre-examination Publication JP-A-09-329649; an English abstract of JP-A-09-329649 is available and the content of the English abstract is also incorporated by reference in its entirety into this application).
Particularly, the system proposed by Japanese Patent Application No. Heisei 08-149641 is so constructed that, within a vacuum chamber of an electron beam tester, one of non-defective and defective LSI samples is quickly located on a measuring position by means of an LSI changing and locating mechanism, and a potential measurement is carried out for the located sample, so that a defective cause place is searched for on the basis of the measured potentials of the non-defective and defective samples. Since information of operating potentials in a normal condition, required to search for the defective cause place, is obtained from actual operating potentials of the non-defective samples, it is possible to search for the defective cause place, without information of circuit connection of the LSI to be analyzed, and without information of logical desired values when a test signal is applied, which information was required in the other system. In many cases it is actually difficult to obtain this information. Since this system can be utilized in the many cases, this system has a wide range of application.
The above mentioned system has such a problem that a considerable execution time is required because it is necessary to carry out the potential measurement at many places for non-defective and defective samples in order to search for a defective cause place.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide an LSI defective automatic analysis system which has overcome the above mentioned problem of the prior art and which is capable of searching for a defective cause for a shortened execution time, without circuit connection information of the LSI to be analyzed, and without information of logical desired values when a test signal is applied, and an analyzing method therefor, and a recording medium of storing a program for causing a computer to execute the analyzing method.
According to the present invention, there is provided an LSI defective automatic analysis system including a potential measuring means for applying a series of predetermined test vectors to a designated sample selected from two samples consisting of a non-defective LSI and a defective LSI both based on the same design, and for measuring an operating potential of a designated place on a surface of the LSI chip at the moment a designated test vector is applied; a potential estimating means receiving another measured potential value already obtained, for estimating, in the same sample, the potential of another place or the potential when another test vector is applied; and a potential measurement condition determining means receiving the measured potential value and the estimated potential value already obtained, for instructing the sample to be measured, the place to be measured and the test vector to be applied, as the condition for the potential measurement required to search for a defective cause place.
One embodiment of the LSI defective automatic analysis system further includes an estimation error correcting means receiving the measured potential value and the estimated potential value, for detecting the contradiction between the measured and estimated potential values, and for correcting an error of the related potential estimation when the contradiction is detected; and a defective cause place deriving means receiving the measured potential value and the estimated potential value, for deriving a range of candidates of defective cause places in the defective sample.
According to a second aspect of the present invention, there is provided an LSI defective automatic analysis method including a potential measuring step for applying a series of predetermined test vectors to a designated sample selected from two samples consisting of a non-defective LSI and a defective LSI both based on the same design, and for measuring an operating potential of a designated place on a surface of the LSI chip at the moment a designated test vector is applied; a potential estimating step receiving another measured potential value already obtained, for estimating, in the same sample, the potential of another place or the potential with another test vector is applied; and a potential measurement condition determining step receiving the measured potential value and the estimated potential value already obtained, for instructing the sample to be measured, the place to be measured and the test vector to be applied, as the condition for the potential measurement required to search for a defective cause place.
One embodiment of the LSI defective automatic analysis method further includes an estimation error correcting step receiving the measured potential value and the estimated potential value, for detecting the contradiction between the measured and estimated potential values, and for correcting an error of the related potential estimation when the contradiction is detected; and a defective cause place deriving step receiving the measured potential value and the estimated potential value, for deriving a range of candidates of defective cause places in the defective sample.
According to a third aspect of the present invention, there is provided a recording medium storing a program for causing a computer to execute a potential measuring step for applying a series of predetermined test vectors to a designated sample selected from two samples consisting of a non-defective LSI and a defective LSI both based on the same design, and for measuring an operating potential of a designated place on a surface of the LSI chip at the moment a designated test vector is applied; a potential estimating step receiving another measured potential value already obtained, for estimating, in the same sample, the potential of another place or the potential with another test vector is applied; and a potential measurement condition determining step receiving the measured potential value and the estimated potential value already obtained, for instructing the sample to be measured, the place to be measured and the test vector to be applied, as the condition for the potential measurement required to search for a defective cause place.
With the above mentioned arrangement, in the system
NEC Corporation
Tu Christine T.
Young & Thompson
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