Tap-selectable reduced state sequence estimator
Target value search circuit, taget value search method, and...
TCAM BIST with redundancy
TCAM BIST with redundancy
Technique for combining scan test and memory built-in self test
Technique for combining scan test and memory built-in self test
Technique for correcting errors in position encoders
Technique for correcting single-bit errors and detecting...
Technique for correcting single-bit errors and detecting...
Technique for correcting single-bit errors in caches with...
Technique for correcting single-bit errors in caches with...
Technique for debugging an integrated circuit having a...
Technique for detecting memory part failures and single, double,
Technique for efficiently organizing and distributing parity...
Technique for efficiently organizing and distributing parity...
Technique for generating single-bit error-correcting,...
Technique for implementing chipkill in a memory system
Technique for partitioning data to correct memory part failures
Technique for partitioning data to correct memory part failures
Technique for payload-independent frame delineation engine...