Survivor path memory circuit and Viterbi decoder with the same
Switch control apparatus, semiconductor device test...
Switch control apparatus, semiconductor device test...
Switch level reliable transmission
Switch with error checking and correcting
Switching circuit for decoder
Symbol based algorithm for hardware implementation of cyclic...
Symbol by symbol variable code rate capable communication...
Symbol by symbol variable constellation type and/or mapping...
Symbol encoding for tolerance to single byte error
Symbol error correction by error detection and logic based...
Symbol level error correction codes which protect against...
Symbol-level soft output Viterbi algorithm (SOVA) and a...
Sync byte padding
Synchronization error detection circuit
Synchronization in a communications system with multicarrier...
Synchronization loss resilient digital communication system...
Synchronization of a communications system
Synchronization of a communications system
Synchronization point across different memory BIST controllers