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Selected: M

Method of interleaving a binary sequence

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Method of interleaving/deinterleaving in a communication system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Data formatting to improve error detection correction...
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Method of joint decoding of possibly mutilated code words

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Method of lattice quantization that minimizes storage requiremen

Error detection/correction and fault detection/recovery – Pulse or data error handling – Data formatting to improve error detection correction...
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Method of linear encoding for erratic transmissions

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
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Method of locating faults in LSI

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method of making logic devices

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method of making tissue simulating analog materials and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method of managing defect areas on an erasable optical disc...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Method of managing fails in a non-volatile memory device and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Method of manufacturing Q-value and device therefor

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error count or rate
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Method of masking corrupt bits during signature analysis and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method of memory build-in self-test

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method of memory error correction by scrubbing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Patent

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Method of micro-architectural implementation of interface...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method of micro-architectural implementation on bist fronted...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method of mobile telecommunications

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Method of outputting internal information through test pin...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method of packet data transfer with hybrid ARQ

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Method of partitioning CRC calculation for a low-cost ATM adapte

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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