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Efficient built-in self test for embedded memories with differin

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Efficient Chien search method and system in Reed-Solomon...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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Efficient chien search method in reed-solomon decoding, and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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Efficient compression and application of deterministic...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Efficient construction of LDPC (Low Density Parity Check)...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
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Efficient construction of LDPC (Low Density Parity Check)...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
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Efficient CRC generation utilizing parallel table lookup...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Efficient CTC encoders and methods

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Efficient data compression circuit for memory testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Efficient decoding

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Efficient decoding

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Efficient design to calculate extrinsic information for...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Efficient design to implement LDPC (Low Density Parity...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Efficient design to implement min**/min**- or max**/max**-...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
Reexamination Certificate

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Efficient encoder for low-density-parity-check codes

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
Reexamination Certificate

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Efficient encoding and decoding methods for representing...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Efficient galois field multiplier structures for...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Efficient hardware implementation of chien search polynomial...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Efficient high-speed Reed-Solomon decoder

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Efficient high-speed Reed-Solomon decoder

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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