Efficient encoder for low-density-parity-check codes

Details Efficient encoder for low-density-parity-check codes Efficient encoder for low-density-parity-check codes

2007-01-09

2007-01-09

Chase, Shelly (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Error/fault detection technique

Reexamination Certificate

active

10724280

ABSTRACT:
Encoder circuitry for applying a low-density parity check (LDPC) code to information words is disclosed. The encoder circuitry takes advantage of a macro matrix arrangement of the LDPC parity check matrix in which a left-hand portion of the parity check matrix is arranged as an identity macro matrix, each entry of the macro matrix corresponding to a permutation matrix having zero or more circularly shifted diagonals. The encoder circuitry includes a cyclic multiply unit, which includes a circular shift unit for shifting a portion of the information word according to shift values stored in a shift value memory for the matrix entry, and a bitwise exclusive-OR function for combining the shifted entry with accumulated previous values for that matrix entry. Circuitry for solving parity bits for row rank deficient portions of the parity check matrix is also included in the encoder circuitry.

REFERENCES:
patent: 6539367 (2003-03-01), Blanksby et al.
patent: 6633856 (2003-10-01), Richardson et al.
patent: 6718514 (2004-04-01), Kang
patent: 6842872 (2005-01-01), Yedida et al.
patent: 7058873 (2006-06-01), Song et al.
patent: 2003/0043487 (2003-03-01), Morita et al.
patent: 2003/0104788 (2003-06-01), Kim
Zhang et al. A class of efficient-encoding generalized low density parity check codes, 2001, IEEE, p. 2477-2480.
Gallager,Low-Density Parity-Check Codes, (MIT Press, 1963).
Mackay et al., “Comparison of Contructions of Irregular Gallager Codes”,Trans. Comm., vol. 47, No. 10 (IEEE, Oct. 1999), pp. 1449-1454.
Tanner et al., “A Class of Group-Structured LDPC Codes”,ISTCA-2001 Proc. (Ambleside, England, 2001).
Richardson et al., “Efficient Endcoding of Low-Density Parity-Check Codes”,IEEE Trans. on Information Theory, vol. 47, No. 2 (Feb. 2001), pp. 638-656.
Zhang et al., “VLSI Implementation-Oriented (3,k)-Regular Low-Density Parity-Check Codes”, IEEE Workshop on Signal Processing Systems (Sep. 2001), pp. 25-36.

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