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Open drain output circuit

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction
Reexamination Certificate

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Open drain type output buffer

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction
Reexamination Certificate

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Open drain type output buffer

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction
Reexamination Certificate

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Open-drain fet output circuit

Electronic digital logic circuitry – Interface – Current driving
Patent

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Operating long on-chip buses

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction
Reexamination Certificate

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Operating system independent support for mixed voltage devices

Electronic digital logic circuitry – Multifunctional or programmable – Array
Patent

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Operation circuit

Electronic digital logic circuitry – Exclusive function – With field-effect transistor
Patent

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Operation mode setting circuit

Electronic digital logic circuitry – With test facilitating feature
Reexamination Certificate

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Operational analysis device of the scan path type having a singl

Electronic digital logic circuitry – With test facilitating feature
Patent

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Operational time extension

Electronic digital logic circuitry – Multifunctional or programmable – Array
Reexamination Certificate

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Operational time extension

Electronic digital logic circuitry – Multifunctional or programmable – Having details of setting or programming of interconnections...
Reexamination Certificate

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Opportunistic time-borrowing domino logic

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates
Patent

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Optical interference signal extractor with device for reduced no

Electronic digital logic circuitry – Multifunctional or programmable – Array
Patent

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Optimal local supply voltage determination circuit

Electronic digital logic circuitry – With test facilitating feature
Reexamination Certificate

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Optimized active SCSI termination technique

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Patent

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Optimized-delay multiplexer

Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Decoding
Reexamination Certificate

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Optimizing and operating a time multiplexed programmable logic d

Electronic digital logic circuitry – Multifunctional or programmable – Array
Patent

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Optimizing logic in non-reprogrammable logic devices

Electronic digital logic circuitry – Multifunctional or programmable – Having details of setting or programming of interconnections...
Reexamination Certificate

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Optimum noise isolated I/O with minimized footprint

Electronic digital logic circuitry – Interface – Current driving
Patent

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Option decoding with on-chip electrical fuses

Electronic digital logic circuitry – Multifunctional or programmable – Having details of setting or programming of interconnections...
Patent

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