Optimizing logic in non-reprogrammable logic devices

Details Optimizing logic in non-reprogrammable logic devices Optimizing logic in non-reprogrammable logic devices

2006-07-25

2006-07-25

Jeanglaude, Jean Bruner (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

C326S040000, C326S041000

Reexamination Certificate

active

07081772

ABSTRACT:
A method for reducing the amount of logic needed to perform logic operations in non-reprogrammable logic devices based on preexisting circuit designs is provided. The logic optimization method reduces die size and power consumption while increasing the performance of the logic device.

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