Open drain output circuit

Details Open drain output circuit Open drain output circuit

2006-12-05

2008-11-25

Tran, Anh Q (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Output switching noise reduction

C326S026000, C326S083000

Reexamination Certificate

active

07456649

ABSTRACT:
An open drain output circuit for use as an I2C bus interface. The open drain output circuit includes an output terminal. An input unit performs a first operation causing the potential at the output node to steeply fall and a second operation for gradually raising the potential in accordance with transition of an input signal. An output transistor connected to the output node of the input unit and the output terminal is turned OFF in the first operation and turned ON in the second operation. A delay time adjustment circuit reduces the difference between a delay time from transition of the input signal until when the output transistor is turned OFF in the first operation and a delay time from transition of the input signal until when the output transistor is turned ON in the second operation.

REFERENCES:
patent: 6222403 (2001-04-01), Mitsuda
patent: 2001/0026178 (2001-10-01), Itoh et al.
patent: 7-30399 (1995-01-01), None
patent: 11-274909 (1999-10-01), None
patent: 11-346147 (1999-12-01), None
patent: 2004-266494 (2004-09-01), None

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