Semiconductor logic circuit device having pull-up/pull-down...
Single clock source for plural scan capture chains
Static current testing apparatus and method for current steering
Structure for externally identifying an internal state of a semi
Switchable pull-ups and pull-downs for IDDQ testing of integrate
System and method for observing information transmitted...
System and method for testing integrated circuits connected toge
System on chip (SOC) and method of testing and/or debugging...
Systems and methods for maintaining board signal integrity
Test circuit for semiconductor integrated logic circuit using tr
Test mode circuit of semiconductor device
Test structures for simultaneous switching output (SSO)...
Testing hot carrier induced degradation to fall and rise time of
Tie-up and tie-down circuits with a primary input for testabilit
Verify scheme for a multi-level routing structure