Electronic digital logic circuitry – With test facilitating feature
Patent
1993-10-20
1995-11-21
Westin, Edward P.
Electronic digital logic circuitry
With test facilitating feature
326115, 327543, 324527, H03K 1900, H03K 19094
Patent
active
054690765
ABSTRACT:
A static current testing method for single-ended or differential logic circuits having a static bias current in normal operation. The static current testing method includes switching a first bias node between a first bias voltage, in a normal operational mode, and a first shut-off voltage, in a first static current testing phase, and measuring the current supplied to the logic circuit in the testing phase. For differential circuits, the static current testing method further includes an additional step of switching a second bias node between the second bias voltage in the normal operational mode and the second shut-off voltage in a second static current testing phase. A bias switching means is used to switch between the normal bias voltage and the testing voltage. A cell switching means is coupled to a diode-connected transistor for forcing the circuit output low and for isolating the diode-connected transistor from the output.
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patent: 5245230 (1993-09-01), Ohri et al.
patent: 5250854 (1993-10-01), Lien
patent: 5254882 (1993-10-01), Eyck
patent: 5309399 (1994-05-01), Murotani
Badyal Rajeev
Linn Scott
Hewlett-Packard Corporation
Roseen Richard
Westin Edward P.
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