System on chip (SOC) and method of testing and/or debugging...

Details System on chip (SOC) and method of testing and/or debugging... System on chip (SOC) and method of testing and/or debugging...

2005-03-01

2005-03-01

Young, Brian (Department: 2819)

Electronic digital logic circuitry

With test facilitating feature

C714S727000

Reexamination Certificate

active

06861866

ABSTRACT:
A system on chip and method of testing and/or debugging the same, where the system on chip includes a plurality of circuits and a control circuit for receiving a serial-parallel mode control signal and at least one selection signal externally input from one or more of a plurality of pins and outputting an output signal depending on values of the serial-parallel mode control signal and the at least one selection signal.

REFERENCES:
patent: 5396498 (1995-03-01), Lestrat et al.
patent: 5510704 (1996-04-01), Parker et al.
patent: 5774475 (1998-06-01), Qureshi
patent: 5831446 (1998-11-01), So et al.
patent: 6044481 (2000-03-01), Kornachuk et al.
patent: 6173428 (2001-01-01), West
patent: 6430718 (2002-08-01), Nayak

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