Single clock source for plural scan capture chains

Details Single clock source for plural scan capture chains Single clock source for plural scan capture chains

2003-04-21

2004-11-09

Tran, Anh Q. (Department: 2819)

Electronic digital logic circuitry

With test facilitating feature

C326S009000, C326S014000

Reexamination Certificate

active

06815978

ABSTRACT:

BACKGROUND
In integrated circuits, scan capture chains (also known as “scan chains”) may be provided to permit capturing of test information during device test procedures. Often it is not practical to clock plural scan chains with the same clock signal because the scanning operations of the scan chains may conflict with each other. It has therefore been proposed to provide separate clocks for scan chains that would otherwise conflict. However, the provision of separate clocks increases the number of device pins used for scan chain clocking. This creates an undesirable increase in the competition for pins, which are a scarce resource in device design.


REFERENCES:
patent: 6418545 (2002-07-01), Adusumilli
patent: 6686759 (2004-02-01), Swamy

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