Search
Selected: O

On-die termination circuit and driving method thereof

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

On-die termination circuit and method for reducing on-chip...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

On-die termination circuit, method of controlling the same,...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

On-die termination control circuit of semiconductor memory...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

On-die termination impedance calibration device

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

On-die termination latency clock control circuit and method...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

On-die terminators formed of coarse and fine resistors

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

On-die-termination control circuit and method

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

On-DRAM termination resistance control circuit and method...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Optimized active SCSI termination technique

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Output buffer apparatus capable of adjusting output...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Output buffer circuit

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Output buffer circuit and integrated circuit including same

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Output buffer circuit for transmitting digital signals over...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Output buffer circuit with control circuit for modifying...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Output buffer circuit with control circuit for modifying...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Output buffer circuit with control circuit for modifying...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Output buffer with time varying source impedance for driving...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Output buffer with variable output impedance

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Output circuit for semiconductor device, semiconductor...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0
  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.