Output buffer with variable output impedance

Details Output buffer with variable output impedance Output buffer with variable output impedance

1994-11-17

1996-09-24

Westin, Edward P.

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

326 86, 326 87, H03K 190185, H03K 190948

Patent

active

055594476

ABSTRACT:
An output buffer with a variable output impedance is described. The buffer is designed so that the output impedance is set relatively low during the initial portion of the output transition in which the step would occur. The output impedance is increased near the end of the transmission to approximate the characteristic impedance of a transmission line driven by the buffer. Specifically, a first feedback circuit in the variable impedance output buffer outputs a first control signal in a first state during a first portion of the output transition. The first feedback circuit outputs the first control signal in a second state during a second portion of the output transition after the first portion. A first switched resistive element receives the first control signal from the first feedback circuit. The first switched resistive element increases the output impedance of the buffer in response to the first control single being in the second state. The second portion of the output transition occurs when the buffer output voltage crosses the threshold as the output voltage approaches the end of the output transition.

REFERENCES:
patent: 5166155 (1992-11-01), Kano
patent: 5218242 (1993-06-01), Imazu et al.
patent: 5239211 (1993-08-01), Jinbo
patent: 5241221 (1993-08-01), Fletcher et al.
patent: 5300828 (1994-04-01), McClure
patent: 5382847 (1995-01-01), Yasuda

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