On-DRAM termination resistance control circuit and method...

Details On-DRAM termination resistance control circuit and method... On-DRAM termination resistance control circuit and method...

2007-06-12

2007-06-12

Chang, Daniel (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

C326S028000, C326S034000, C327S378000, C365S189050

Reexamination Certificate

active

10737069

ABSTRACT:
An on-DRAM termination resistance control circuit is capable of controlling resistance of an IC termination and minimizing area for the resistance control circuit by using a simplified circuit scheme. The on-DRAM termination resistance control circuit includes a push-up resistance adjusting unit, a pull-down resistance adjusting unit and resistance adjustment control unit. The push-up resistance adjusting unit adjusts resistances of a first and a second inner resistors based on an external reference resistor. The pull-down resistance adjusting unit adjusts a resistance of a third resistor based on the second inner resistor that is adjusted by adjustment of the push-up resistance control unit. The resistance adjustment control unit controls to alternatively repeat the operation of the push-up resistance adjusting unit and the pull-down resistance adjusting unit for a predetermined number of adjustment times.

REFERENCES:
patent: 6064224 (2000-05-01), Esch et al.
patent: 6307791 (2001-10-01), Otsuka et al.
patent: 6429679 (2002-08-01), Kim et al.
patent: 6535047 (2003-03-01), Mughal et al.
patent: 10-2004-21110 (2004-10-01), None

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