On-die-termination control circuit and method

Details On-die-termination control circuit and method On-die-termination control circuit and method

2008-06-09

2009-12-01

Tran, Anh Q (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

C326S032000, C326S033000

Reexamination Certificate

active

07626417

ABSTRACT:
On-die-termination control circuit includes a clock generator configured to generate shift clocks in response to an on/off control signal; and a shift register configured to delay the on/off control signal in synchronization with the shift clocks to control on/off timing of an ODT operation.

REFERENCES:
patent: 2004/0240298 (2004-12-01), Jin
patent: 2008/0204071 (2008-08-01), Lee et al.

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