Low power dynamic logic gate with full voltage swing operation
Low power entry latch to interface static logic with dynamic...
Low power pre-discharged ratio logic
Low power, high performance latching interfaces for converting d
Low power, self-gated, pulse triggered clock gating cell
Low skew multiplexer network and programmable array clock/reset
Low skew signal generation circuit
Low switching activity dynamic driver for high performance...
Low switching power limited switch dynamic logic
Low threshold voltage silicon-on-insulator clock gates
Low-latency small-swing clocked receiver
Low-latency small-swing clocked receiver
Low-power, compact digital logic topology that facilitates large
Low-power-dissipation CMOS circuits
Low-power-dissipation CMOS circuits
Low-to-high voltage conversion method and system
Maskable dynamic logic
Metastability recovery circuit
Method and apparatus for a 1 of N signal
Method and apparatus for a failure-free synchronizer