Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor
Patent
1995-04-10
1996-11-05
Westin, Edward P.
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
Field-effect transistor
326 98, 326 83, 326108, H03K 1900
Patent
active
055721508
ABSTRACT:
A circuit and method are provided for reducing the DC power consumption of clocked ratioed digital logic circuits. The circuit includes switching circuitry designed to analyze the voltage transitions of a ratioed digital logic circuit and based on such transitions, control the DC current flow through the entire circuit. Through the regulation of DC current flow through a digital logic circuit, the present invention reduces the detrimental effects of hot-electron effects and electromigration concerns which cause digital circuitry to fail. The circuit and method are illustrated by way of a ratioed logic NOR function employing MOSFET technology.
REFERENCES:
patent: 3911289 (1975-10-01), Takemoto
patent: 4042838 (1977-08-01), Street et al.
patent: 4386284 (1983-05-01), Wacyk et al.
patent: 4404474 (1983-09-01), Dingwall
patent: 4446386 (1984-05-01), Kurafuji
patent: 4647797 (1987-03-01), Sanwo
patent: 4649296 (1987-03-01), Shoji
patent: 4651029 (1987-03-01), Oritani
patent: 4692639 (1987-09-01), Jordan
patent: 4788457 (1988-11-01), Mashiko
patent: 4843261 (1989-06-01), Chappell
patent: 4857764 (1989-08-01), Young
patent: 4857768 (1989-08-01), Griffith et al.
patent: 5105104 (1992-04-01), Eisele
patent: 5159210 (1992-10-01), Eitrheim
Kartschoke Paul D.
Rohrer Norman J.
International Business Machines - Corporation
Sanders Andrew
Westin Edward P.
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