Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor
Patent
1997-07-18
1999-11-02
Tokar, Michael
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
Field-effect transistor
326 81, 326115, 327 55, H03K 19096
Patent
active
059777982
ABSTRACT:
The present invention achieves the stated input receiver goals by merging many of the different functions required into a single unit instead of serializing them in the more traditional fashion. The present invention provides a receiver circuit having both a source-follower pair of MOS transistors, and a source-coupled pair of MOS transistors. The connecting node between these two pairs is coupled to a sense amplifier. The simultaneous use of the source-follower pair, the source-coupled pair and the sense-amplifier transistors allows for fast amplification of the low-swing input to full-rail CMOS, when triggered by a CMOS input clock.
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Galliani William S.
Le Don Phu
Rambus Incorporated
Tokar Michael
LandOfFree
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