Hardware coordination of power management activities
High gain local clock buffer for a mesh clock distribution...
High-speed bus with embedded clock signals
Hold-reset mode selection counter and operation method thereof
I2C repeater with voltage translation
I2C/SMBus start-stop detecting circuit that reduces the...
IDE control device suitable for supplying a plurality of...
Image signal processing method and image signal processor
Implementation of wait-states
Implementing counters in a system with limited primary memory
Information processing apparatus and method
Information processing apparatus and method
Information processing apparatus with CPU-load-based clock frequ
Information processing device and electronic equipment
Information processing system has clock lines which are...
Information processor and information processing system utilizin
Information processor and information processing system...
Information transmission system and information transmission...
Input clock delayed by a plurality of elements that are...
Instruction dependent clock scheme