Information processing system has clock lines which are...

Details Information processing system has clock lines which are... Information processing system has clock lines which are...

2006-09-05

2006-09-05

Cao, Chun (Department: 2115)

Electrical computers and digital processing systems: support

Clock, pulse, or timing signal generation or analysis

C713S503000, C713S600000, C711S167000

Reexamination Certificate

active

07103792

ABSTRACT:
A system includes modules, a clock generator that generates a first clock signal that is applied to the modules, and a chipset that controls the modules, the chipset having a clock buffer that generates a second clock signal. The system includes a first clock line that transfer the first clock signal to the clock buffer, the first clock line connected between the clock generator and a first termination circuit. The system includes a second clock line that transfer the second clock signal to the modules, the second clock line electrically isolated from the first clock line, the second clock line connected between the clock buffer and a second termination circuit.

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“QDR II and DDRII SRAM Clocking Strategies”, Micron technical Note, 2001, pp. 1-9.
English language abstract of Korean Publication No. 1999-022545.

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