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Obtaining a phase error of a clock signal

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Correction for skew – phase – or rate
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Obtaining configuration data for a data processing apparatus

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Multiple or variable intervals or frequencies
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Obtaining configuration data for a data processing apparatus

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Multiple or variable intervals or frequencies
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Off-chip signal routing between multiply-connected on-chip...

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
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On-board clock-control templates for testing integrated...

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Multiple or variable intervals or frequencies
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On-chip clock generator allowing rapid changes of on-chip...

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
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One-wire approach and its circuit for clock-skew compensating

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Correction for skew – phase – or rate
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Operation and maintenance of clock distribution networks...

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
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Operation mode scheduling

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Counting – scheduling – or event timing
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Optimum stable composite clock network

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
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Output buffer having a plurality of switching devices being...

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Counting – scheduling – or event timing
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Over-clocking detection system utilizing a reference signal...

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
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Overclock detection

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
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Overclock detection

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
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Oversampling-based scheme for synchronous interface...

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
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