Data processor for processing a complex instruction by dividing

Data processor for the parallel processing of a plurality of...

Data processor having 2n bits width data bus for context...

Data processor having a respective multiplexer for each...

Data processor having an instruction decoder

Data processor having an instruction decoder and a plurality of

Data processor having memory access unit with predetermined...

Data processor having repeat instruction processing using...

Data processor instruction system for grouping instructions...

Data processor speeding up repeat processing by inhibiting...

Data processor system having branch control and method thereof

Data processor using indirect register addressing

Data processor with changeable architecture

Data processor with execution control for first and second execu

Data processor with individually writable register subword...

Data processor with multi-command instruction words

Data processor with multiple compare extension instruction

Data processor with multiple compare extension instruction

Data processor with selectable word length

Data processor with selectable word length