Electrical computers and digital processing systems: processing – Byte-word rearranging – bit-field insertion or extraction,...
Patent
1998-11-09
2000-02-29
Follansbee, John A.
Electrical computers and digital processing systems: processing
Byte-word rearranging, bit-field insertion or extraction,...
710105, G06F 706
Patent
active
060322535
ABSTRACT:
A programmable data communications device is provided to process multiple streams of data according to multiple protocols. The device is equipped with a co-processor including multiple, programmable processors allowing data to be operated on by multiple protocols. The programmable processors within the co-processor include extended instruction sets including instructions providing the operations of zero stuffing, CRC computation, partial compare, conditional move, and trie traversal. These instructions allow the processor(s) of the co-processor to more efficiently execute programs implementing data communications protocols. Since each processor is programmable, protocols standards which change may be accommodated. A network device equipped with the co-processor can handle multiple simultaneous streams of data and can implement multiple protocols on each data stream. The protocols can execute within the co-processor either independently of each other, or in conjunction with each other.
REFERENCES:
patent: 5394394 (1995-02-01), Crowther et al.
patent: 5598410 (1997-01-01), Stone
Data Sheet 7711 "Encryption Processor," Hi/fn, Inc., San Jose, CA, PRS-056 Revision 1.01 (1998).
Data Sheet 9711 "Data Compression Coprocessor," Hi/fn, Inc., San Jose, CA, PRS-0053 Revision 1.1 (Aug. 1997).
Bahr Raymond G.
Cashman John D.
Riley Paul M.
Ye Wei
Cisco Technology Inc.
Follansbee John A.
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