Microprocessor including microcode unit that only changes...

Microprocessor including multiple register files mapped to...

Microprocessor including random number generator supporting...

Microprocessor including return prediction unit configured...

Microprocessor instruction fetch unit for processing...

Microprocessor instruction pipeline having inhibit logic at...

Microprocessor instruction that allows system routine calls...

Microprocessor instructions for efficient bit stream...

Microprocessor processing specified instructions as operands

Microprocessor protected against parasitic interrupt signals

Microprocessor starting to execute a computer program at a...

Microprocessor system and method for instruction-initiated...

Microprocessor system for simultaneously accessing multiple...

Microprocessor system with flexible instruction controlled by pr

Microprocessor that carries out context switching by...

Microprocessor that detects erroneous speculative prediction...

Microprocessor with a nestable delayed branch instruction withou

Microprocessor with an instruction for setting or clearing a bit

Microprocessor with an instruction immediately next to a...

Microprocessor with arithmetic processing units and arithmetic e