Electrical computers and digital processing systems: processing – Processing control – Branching
Reexamination Certificate
2005-03-01
2005-03-01
Chan, Eddie (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Branching
C712S207000
Reexamination Certificate
active
06862680
ABSTRACT:
A microprocessor avoids loss of instructions in a pre-fetch procedure when a branch instruction is received. When a new branch instruction that specifies a branch end is received by a queue buffer, all the instructions preceding the specified branch end are processed as an operand of the branch instruction. Moreover, the instruction word length of the branch instruction including the instruction that has been processed as the operand is output to a program counter, so the queue buffer is not flushed.
REFERENCES:
patent: 5764946 (1998-06-01), Tran et al.
patent: 7-73034 (1995-03-01), None
patent: 7-239781 (1995-09-01), None
patent: 2000-20308 (2000-01-01), None
Breeding, Kenneth J., Microprocessor System Design Fundamentals, 1995, Prentice-Hall, p. 28.*
Kurian et al., Classification and performance evaluation of instruction buffering techniques, website, May 3, 2003, pp. 153, 157, IEEE Xplore.
Intel Architecture Software Developer's Manual-Instructions Formats and Encoding Appendix B; Order No. 243191; Intel; 1997; vol. 2; p. B1-B10.
Chan Eddie
Leydig , Voit & Mayer, Ltd.
Meonske Tonia L.
Renesas Technology Corp.
LandOfFree
Microprocessor processing specified instructions as operands does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Microprocessor processing specified instructions as operands, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Microprocessor processing specified instructions as operands will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3444892