LandOfFree - US Patents - Listing for Electrical computers and digital processing systems: processing

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Mechanism for freeing registers on processors that perform...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing

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Mechanism for handling failing load check instructions

Electrical computers and digital processing systems: processing – Processing control – Branching

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Mechanism for hardware tracking of return address after tail...

Electrical computers and digital processing systems: processing – Processing control – Branching

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Mechanism for irrevocable transactions

Electrical computers and digital processing systems: processing – Processing control – Processing control for data transfer

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Mechanism for load block on store address generation

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...

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Mechanism for multiple register renaming and method therefor

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing

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Mechanism for power efficient processing in a pipeline...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...

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Mechanism for predicting and suppressing instruction replay...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Reducing an impact of a stall or pipeline bubble

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Mechanism for processing speclative LL and SC instructions...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...

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Mechanism for processing speculative LL and SC instructions...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...

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Mechanism for queuing store data and method therefor

Electrical computers and digital processing systems: processing – Processing architecture

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Mechanism for recovery from termination of a program...

Electrical computers and digital processing systems: processing – Processing control – Processing sequence control

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Mechanism for resource allocation in a digital signal...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing

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Mechanism for self-initiated instruction issuing and method...

Electrical computers and digital processing systems: processing – Instruction issuing – Simultaneous issuance of multiple instructions

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Mechanism for self-initiated instruction issuing and method...

Electrical computers and digital processing systems: processing – Processing control – Processing sequence control

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Mechanism for using performance counters to identify reasons...

Electrical computers and digital processing systems: processing – Processing control – Specialized instruction processing in support of testing,...

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Mechanism in a microprocessor for executing native...

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate plural instruction...

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Mechanism to determine actual code execution flow in a computer

Electrical computers and digital processing systems: processing – Processing control – Branching

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Mechanism to save and restore cache and translation trace...

Electrical computers and digital processing systems: processing – Processing control – Context preserving (e.g. – context swapping – checkpointing,...

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Memory accelerator for ARM processor pre-fetching multiple...

Electrical computers and digital processing systems: processing – Instruction fetching – Prefetching

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