Storing predicted branch target address in different storage...

Storing results of resolvable branches during speculative...

Structure for dynamically adjusting pipelined data paths for...

Structured programming control flow in a SIMD architecture

Structured programming control flow using a disable mask in...

Substituting specified instruction with NOP to functional...

Superscalar microprocessor stack structure for judging validity

Superscalar processor and method for incrementally issuing...

Support of a plurality of graphic processing units

Supporting multi-dimensional space-time computing through...

Supporting space-time dimensional program execution by...

Switching between a plurality of branch prediction processes...

Symmetric multiprocessor operating system for execution on...

Symmetric multiprocessor operating system for execution on...

Synchronization of load operations using load fence...

Synchronized instruction advancement through CPU and FPU...

Synchronous network traffic processor

Synchronous network traffic processor

Synchronous network traffic processor

Synthesizing the instruction stream executed by a...