Substituting specified instruction with NOP to functional...

Electrical computers and digital processing systems: processing – Processing control – Instruction modification based on condition

Reexamination Certificate

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C712S213000, C712S214000, C713S322000

Reexamination Certificate

active

06877087

ABSTRACT:
A microprocessor to reduce wasteful power consumption of the floating-point unit. An instruction invalidation logic circuit is utilized to substitute the instruction not-to-use-the-floating-point unit, in the instruction string supplied from the instruction cache, with an invalidating instruction, hold that invalidating instruction in the floating-point register, and supply that invalidating instruction to a floating-point decoder in the floating-point unit. In cases when the invalidating instruction was continuous, the power consumption in the floating-point data path as well as the in the floating-point decoder and floating-point register is reduced.

REFERENCES:
patent: 4167778 (1979-09-01), Sipple
patent: 5031096 (1991-07-01), Jen et al.
patent: 5212693 (1993-05-01), Chao et al.
patent: 5619408 (1997-04-01), Black et al.
patent: 5742794 (1998-04-01), Potter
patent: 6438680 (2002-08-01), Yamada et al.
patent: 8-101820 (1996-04-01), None

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