L1 cache memory
L2 cache array topology for large cache with different...
L2 cache array topology for large cache with different...
L2 cache controller with slice directory and unified cache...
L2 cache controller with slice directory and unified cache...
L2 cache maintaining local ownership of remote coherency blocks
Large capacity data storage systems using redundant buses
Large capacity storage apparatus having storage cells, an access
Large high bandwidth memory system
Large scale FIFO circuit
Laser drivers that provide double buffering of serial transfers
Laser drivers that provide double buffering of serial transfers
Latched address multi-chunk write to EEPROM
Latched address multi-chunk write to EEPROM
Latched address multi-chunk write to EEPROM
Latency aligned volume provisioning methods for...
Latency reduction for cache coherent bus-based cache
Latency reduction using negative clock edge and read flags
Latency reduction using negative clock edge and read flags
Latency-aware replacement system and method for cache memories