Large high bandwidth memory system

Details Large high bandwidth memory system Large high bandwidth memory system

2006-08-08

2006-08-08

Sparks, Donald (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S005000, C711S119000, C711S127000, C711S157000, C365S230030, C365S230040

Reexamination Certificate

active

07089379

ABSTRACT:
A memory system is divided into memory subsystems. Each subsystem includes a slave controller. Each slave controller is coupled to a serial link. A master controller is coupled to the slave controllers via the serial links, and the master controller is capable of initiating a memory access to a memory subsystem by communicating with the slave controller via the serial link. Each memory subsystem includes memory arrays coupled to the slave controller. Each memory array includes memory channels. Memory accesses to a memory array on a memory subsystem are interleaved by the slave controller between the memory channels, and memory accesses to a memory subsystem are striped by the slave controller between the memory arrays on the memory subsystem. Memory accesses are striped between memory subsystems by the master controller. The master controller and slave controllers communicate by sending link packets and protocol packets over the serial links.

REFERENCES:
patent: 6125421 (2000-09-01), Roy
patent: 6260127 (2001-07-01), Olarig et al.
patent: 6640282 (2003-10-01), MacLaren et al.

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