Systems and methods for memory read response latency detection
Systolic memory arrays
Tamper-resistant method and data processing system using the...
Techniques to asynchronously operate a synchronous memory
Time slicing device for shared resources and method for...
Time slicing device for shared resources and method for...
Timesharing internal bus, particularly for non-volatile...
Timing calibration apparatus and method for a memory device...
Trace buffer for DDR memories
Transceiver with latency alignment circuitry
Transceiver with latency alignment circuitry
Transceiver with latency alignment circuitry
Transceiver with latency alignment circuitry
Transceiver with latency alignment circuitry
Transparent SDRAM in an embedded environment
Transporting data transmission units of different sizes...
Unified memory system for multiple processors and method for...
Use of a cache ownership mechanism to synchronize multiple...
User configurable memory system having local and global...
Using a timing-look-up-table and page timers to determine...