Transceiver with latency alignment circuitry

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing

Reexamination Certificate

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C711S154000, C710S025000, C710S029000, C710S045000, C710S106000

Reexamination Certificate

active

07124270

ABSTRACT:
A transceiver device comprises a transmitter to transmit signals over a plurality of conductors to a memory device. An interface receives control information from a serial communication path coupled to a controller device. The control information is provided to the memory device as the signals using the transmitter. A register stores a control parameter that specifies a drive strength adjustment to the signals to transmit over the plurality of conductors to the memory device using the transmitter.

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