Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate
2006-03-07
2006-03-07
Chace, Christian P. (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Access timing
C365S191000, C365S233100, C710S025000, C710S029000, C710S045000, C710S058000, C710S106000, C711S154000, C713S400000, C713S600000, C375S219000, C358S508000
Reexamination Certificate
active
07010658
ABSTRACT:
In a transceiver system a first interface receives data from a first channel using a first clock signal and transmits data to the first channel using a second clock signal. A second interface receives data from a second channel using a third clock signal and transmits data to the second channel using a fourth clock signal. A re-timer re-times data received from the first channel using the first clock signal and retransmits the data to the second channel using the fourth clock signal.
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Dillon, legal representative Nancy D.
Donnelly Kevin
Johnson Mark
Tran Chanh
Chace Christian P.
Rambus Inc.
Vierra Magen Marcus Harmon & DeNiro LLP
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