Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate
2006-08-17
2011-12-27
Bragdon, Reginald (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Access timing
C711S154000, C710S025000, C710S029000, C710S045000, C710S106000
Reexamination Certificate
active
08086812
ABSTRACT:
In a transceiver system a first interface receives data from a first channel using a first clock signal and transmits data to the first channel using a second clock signal. A second interface receives data from a second channel using a third clock signal and transmits data to the second channel using a fourth clock signal. A re-timer re-times data received from the first channel using the first clock signal and retransmits the data to the second channel using the fourth clock signal.
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Dillon John B.
Dillon, legal representative Nancy D.
Donnelly Kevin
Johnson Mark
Tran Chanh
Bragdon Reginald
Rambus Inc.
Vierra Magen Marcus & DeNiro LLP
Vo Thanh
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