Buffer memory controller storing and extracting data of varying

Buffer page roll implementation for PCI-X block read...

Buffer pre-registration

Buffered memory module with implicit to explicit memory...

Burst access of registers at non-consecutive addresses using...

Burst address generator having two modes of operation employing

Burst instruction alignment method apparatus and method...

Bus control system

Bus filter for memory address translation

Bus interface selection by page table attributes

Byte alignment circuitry

Byte alignment circuitry

Cachability attributes of virtual addresses for optimizing perfo

Cache array select logic allowing cache array size to differ fro

Cache control program

Cache controller with table walk logic tightly coupled to second

Cache memory bank access prediction

Cache memory indexing using virtual, primary and secondary color

Cache memory system including a partially hashed index

Cache memory with reduced access time