Electrical computers and digital processing systems: memory – Address formation – Slip control – misaligning – boundary alignment
Reexamination Certificate
2006-05-02
2006-05-02
Jeanpierre, Peguy (Department: 2819)
Electrical computers and digital processing systems: memory
Address formation
Slip control, misaligning, boundary alignment
C341S101000
Reexamination Certificate
active
07039787
ABSTRACT:
Circuitry for locating the boundaries between bytes in a data stream is only selectively enabled to find a possible new byte alignment by a control signal. After the byte alignment circuitry has found a byte alignment, it outputs byte-aligned data and a first status signal indicating the presence of such data. If the byte alignment circuitry subsequently detects information that suggests a possible need for a new or changed byte alignment, it outputs a second status signal to that effect. However, the byte alignment circuitry does not actually attempt to change its byte alignment until enabled to do so by the control signal. Programmable logic circuitry or other utilization circuitry is typically provided to receive the outputs of the byte alignment circuitry and to selectively provide the control signal.
REFERENCES:
patent: 5297242 (1994-03-01), Miki
patent: 6650140 (2003-11-01), Lee et al.
patent: 6724328 (2004-04-01), Lui et al.
patent: 6750675 (2004-06-01), Venkata et al.
patent: 2001/0033188 (2001-10-01), Aung et al.
Lee Chong H.
Venkata Ramanand
Altera Corporation
Fish & Neave IP Group of Ropes & Gray LLP
Jackson Robert R.
Jeanpierre Peguy
Lauture Joseph
LandOfFree
Byte alignment circuitry does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Byte alignment circuitry, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Byte alignment circuitry will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3539175