LandOfFree - US Patents - Listing for Electrical computers and digital processing systems: memory,Address formation

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Galois-based incremental hash module

Electrical computers and digital processing systems: memory – Address formation – Hashing

Reexamination Certificate

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GART and PTES defined by configuration registers

Electrical computers and digital processing systems: memory – Address formation – Address mapping

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GART and PTES defined by configuration registers

Electrical computers and digital processing systems: memory – Address formation – Address mapping

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Generating a set of pre-fetch address candidates based on...

Electrical computers and digital processing systems: memory – Address formation – Generating prefetch – look-ahead – jump – or predictive address

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Generating a set of pre-fetch address candidates based on...

Electrical computers and digital processing systems: memory – Address formation – Generating prefetch – look-ahead – jump – or predictive address

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Generating computer instructions having operand offset...

Electrical computers and digital processing systems: memory – Address formation – Varying address bit-length or size

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Generating lookahead tracked register value based on...

Electrical computers and digital processing systems: memory – Address formation – Generating prefetch – look-ahead – jump – or predictive address

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Generating updated virtual disks using distributed mapping...

Electrical computers and digital processing systems: memory – Address formation – Address mapping

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Generating updated virtual disks using distributed mapping...

Electrical computers and digital processing systems: memory – Address formation – Address mapping

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Generating updated virtual disks using distributed mapping...

Electrical computers and digital processing systems: memory – Address formation – Address mapping

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Generation of address pattern through employment of one or...

Electrical computers and digital processing systems: memory – Address formation – Generating a particular pattern/sequence of addresses

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Generation of memory addresses for accessing a memory...

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

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Generation of native code to enable page table access

Electrical computers and digital processing systems: memory – Address formation – Address mapping

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Generation of unique address alias for memory disambiguation buf

Electrical computers and digital processing systems: memory – Address formation – Generating a particular pattern/sequence of addresses

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