Bus filter for memory address translation

Details Bus filter for memory address translation Bus filter for memory address translation

2007-05-15

2007-05-15

Tran, Denise (Department: 2185)

Electrical computers and digital processing systems: memory

Address formation

Address mapping

C711S207000

Reexamination Certificate

active

10652137

ABSTRACT:
A bus filter includes a first bus interface connected to a system bus for receiving a virtual memory address and a second interface connected to the system bus for transmitting a physical memory address. In operation, an address translation unit, such as a translation lookaside buffer, determines the physical memory address from the virtual memory address. The bus filter may be used to couple a processing device, such as an accelerator, to a system having a core processor and an external memory unit coupled by a bus.

REFERENCES:
patent: 5937436 (1999-08-01), Watkins
patent: 6671791 (2003-12-01), McGrath
patent: 2003/0028751 (2003-02-01), McDonald et al.

Affiliated with

Also associated with

Rating

Bus filter for memory address translation does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Bus filter for memory address translation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bus filter for memory address translation will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3757467