Electrical computers and digital processing systems: memory – Address formation – Hashing
Reexamination Certificate
2004-11-10
2009-10-20
Kim, Matt (Department: 2188)
Electrical computers and digital processing systems: memory
Address formation
Hashing
C711S118000, C711S122000, C711S127000, C711S206000, C711S217000, C711S220000
Reexamination Certificate
active
07606994
ABSTRACT:
In one embodiment, a cache memory system includes a cache memory coupled to a cache controller. The cache memory controller may receive an address and generate an index value corresponding to the address for accessing a particular entry within the cache memory. More particularly, the cache controller may generate the index value by performing a hash function on a first portion of the address such as an address tag, and combining a result of the hash function with a second portion of the address such as an index, for example.
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Kim Matt
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Patel Kaushikkumar
Sun Microsystems Inc.
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