Sea-of-cells array of transistors
Search algorithm for inheriting clock contexts in hardware...
Searching for a path through a circuit
Searching for counter-examples intelligently
Secure exchange of information in electronic design automation
Secure, stable on chip silicon identification
Security-sensitive semiconductor product, particularly a...
Selectable device options for characterizing semiconductor...
Selection of evaluation point locations based on proximity...
Selection of functions within an integrated circuit
Selective optical proximity layout design data correction
Selective promotion for resolution enhancement techniques
Selective promotion for resolution enhancement techniques
Selective shielding for multiple exposure masks
Selectively applying resolution enhancement techniques to...
Selectively reducing the number of cell evaluations in a...
Selectively reducing transistor channel length in a...
Self-contained embedded test design environment and...
Self-describing IP package for enhanced platform based SOC...
Self-diagnostic circuit of I/O circuit system