Accurate layout modeling for centerline-based detail routing
Accurate parasitic capacitance extraction for ultra large...
Accurate parasitics estimation for hierarchical customized...
Accurate wire load model
Accurately modeling an asynchronous interface using expanded...
Accurately tuning resistors
Achieving fast parasitic closure in a radio frequency...
Acoustic 3D analysis of circuit structures
Activation path simulation equipment and activation path...
Active impedance compensation
Active impedance compensation
Active region management techniques and associated methods...
Active skew control of a digital phase-lock loop using delay...
Active trace debugging for hardware description languages
Active trace rerouting
Acute angle avoidance during routing
Acyclic modeling of combinational loops
Adaptable circuit blocks for use in multi-block chip design
Adaptable circuit blocks for use in multi-block chip design
Adaptive adjustment of constraints during PLD placement...