Integrated circuit with gate-array interconnections routed over
Integrated circuit with layout effective for high-speed processi
Integrated circuit with reduced analog coupling noise
Integrated circuit with reduced analog coupling noise
Integrated circuit with variable pad pitch
Integrated circuit with variable pad pitch
Integrated CMOS gate-array circuit
Integrated semiconductor circuit having contact points and...
Integrated semiconductor configuration
Inter-tile buffer system for a field programmable gate array
Interconnect structure with programmable IC for interconnecting
Interconnect substrate with circuits for field-programmability a
Interconnect substrate with circuits for field-programmability a
Interconnect substrate with circuits for field-programmability a
Interconnection structure of a semiconductor device
Interconnection utilizing diagonal routing
Interleaved termination ring
Laser link structure capable of preventing an upper crack...
Lay-out structure of power source potential lines and grand pote
Layout architecture for improving circuit performance